• Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf
  • Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf
  • Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf
  • Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf
  • Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf
  • Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf

Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf

shape: Surface Mount
Conductive Type: Unipolar Integrated Circuit
Integration: GSI
Technics: Semiconductor IC
Manufacturer: Microchip
Transport Package: Carton
Samples:
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Overview

Basic Info.

Model NO.
SY89874UMG
Specification
10*10*10cm
Trademark
FT
Origin
China
HS Code
85416000
Production Capacity
100000

Product Description

Product Description

This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622 MHz or higher) CML, LVPECL, LVDS, or HSTL clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock. Available divider ratios are 2, 4, 8, and 16, or straight pass-through. In a typical 622 MHz clock system this would provide availability of 311 MHz, 155 MHz, 77 MHz, or 38 MHz auxiliary clock components. The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards. A VREF-AC reference is included for AC-coupled applications. The /RESET input asynchronously resets the divider. In the pass-through function (divide by 1) the /RESET synchronously enables or disables the outputs on the next falling edge of IN (rising edge of /IN)


Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-MlfClock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf

Clock Fanout Buffer (Distribution) , Divider IC 1: 2 2.5 GHz 16-Vfqfn Exposed Pad, 16-Mlf

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