Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad

Product Details
Conductive Type: Unipolar Integrated Circuit
Integration: GSI
Technics: Semiconductor IC
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  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
  • Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad
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  • Overview
  • Product Description
Overview

Basic Info.

Model NO.
CDCLVD110ARHBT
shape
Surface Mount
Transport Package
Carton
Specification
10*10*10cm
Trademark
FT
Origin
China
HS Code
85416000
Production Capacity
100000

Product Description

Product Description

The CDCLVD110A clock driver distributes one pair of differential LVDS clock inputs (either CLK0 or CLK1) to 10 pairs of differential clock outputs (Q0 to Q9) with minimum skew for clock distribution. The CDCLVD110A is specifically designed to drive 50-Ω transmission lines. When the control enable is high (EN = 1), the 10 differential outputs are programmable in that each output can be individually enabled or disabled (3-stated) according to the first 10 bits loaded into the shift register. Once the shift register is loaded, the last bit selects either CLK0 or CLK1 as the clock input. However, when EN = 0, the outputs are not programmable and all outputs are enabled. The CDCLVD110A has an improved start-up circuit that minimizes enabling time in AC- and DC-coupled systems. The CDCLVD110A is characterized for operation from -40°C to 85°C.
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Clock Fanout Buffer (Distribution) , Multiplexer IC 2: 10 1.1 GHz 32-Vfqfn Exposed Pad

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